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<title>MTB CAT1 Peripheral driver library: DMAC         (Direct Memory Access Controller)</title>
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<a href="#groups">API Reference</a>  </div>
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<div class="title">DMAC (Direct Memory Access Controller)</div>  </div>
</div><!--header-->
<div class="contents">
<a name="details" id="details"></a><h2 class="groupheader">General Description</h2>
<p>Configures the DMA Controller block, channels and descriptors. </p>
<p>The functions and other declarations used in this driver are in cy_dmac.h. You can include cy_pdl.h to get access to all functions and declarations in the PDL.</p>
<p>The DMA Controller channel can be used in any project to transfer data without CPU intervention basing on a hardware trigger signal from another component.</p>
<p>The DMA Controller block has a set of registers, a base hardware address, and supports multiple channels. Many API functions for the DMAC driver require a base hardware address and channel number. Ensure that you use the correct hardware address for the DMA Controller block in use.</p>
<p>Features:</p><ul>
<li>Multiple channels (device specific).</li>
<li>Four priority levels for each channel.</li>
<li>Descriptor chaining.</li>
<li>Configurable data transfer width/masking: byte, half-word (2-byte), and word (4-byte).</li>
<li>Configurable source and destination addresses.</li>
<li>Single transfer, 1D, 2D, memory copy and scatter transfer descriptor types are supported.</li>
<li>Configurable input/output triggers and interrupts.</li>
</ul>
<h1><a class="anchor" id="group_dmac_configuration"></a>
Configuration Considerations</h1>
<p>To set up a DMAC driver, initialize a descriptor, initialize and enable a channel, and enable the DMAC block.</p>
<p>To set up a descriptor, provide the configuration parameters for the descriptor in the <a class="el" href="structcy__stc__dmac__descriptor__config__t.html">cy_stc_dmac_descriptor_config_t</a> structure. Then call the <a class="el" href="group__group__dmac__descriptor__functions.html#gad4204ef079b02d9afdd9328f0cd461f9">Cy_DMAC_Descriptor_Init</a> function to initialize the descriptor in SRAM. You can modify the source and destination addresses dynamically by calling <a class="el" href="group__group__dmac__descriptor__functions.html#ga6b71b6054e4e16bb3ba58bfdd5bab2cc">Cy_DMAC_Descriptor_SetSrcAddress</a> and <a class="el" href="group__group__dmac__descriptor__functions.html#gad9a9e073cd42384059732d86bd3c8dbf">Cy_DMAC_Descriptor_SetDstAddress</a>.</p>
<p>To set up a DMAC channel, provide a filled <a class="el" href="structcy__stc__dmac__channel__config__t.html">cy_stc_dmac_channel_config_t</a> structure. Call the <a class="el" href="group__group__dmac__channel__functions.html#ga7b508e6cc332b4d009bf9b09ed6529b3">Cy_DMAC_Channel_Init</a> function, specifying the channel number. Use <a class="el" href="group__group__dmac__channel__functions.html#gab39e11c3ad72ebfd07cdd9840385769b">Cy_DMAC_Channel_Enable</a> to enable the configured DMAC channel.</p>
<p>Call <a class="el" href="group__group__dmac__channel__functions.html#gab39e11c3ad72ebfd07cdd9840385769b">Cy_DMAC_Channel_Enable</a> for each DMAC channel in use.</p>
<p>When configured, another peripheral typically triggers the DMAC channel. The trigger is connected to the DMAC channel using the trigger multiplexer. The trigger multiplexer driver has a software trigger you can use in firmware to trigger the DMAC channel. See the <a href="group__group__trigmux.html">Trigger Multiplexer</a> documentation.</p>
<p>The following is a simplified structure of the DMAC driver API interdependencies in a typical user application: </p><div class="image">
<img src="dmac.png" alt="dmac.png"/>
</div>
<p><b>NOTE:</b> DMAC will read descriptors from SRAM memory. To run DMAC on devices with Core CM7, D cache needs to be cleaned before calling <a class="el" href="group__group__dmac__channel__functions.html#gab39e11c3ad72ebfd07cdd9840385769b">Cy_DMAC_Channel_Enable</a> and should be invalidated after DMAC transfer. <br />
<b>NOTE:</b> Even if a DMAC channel is enabled, it is not operational until the DMAC block is enabled using function <a class="el" href="group__group__dmac__block__functions.html#ga3f45f389340c3282c59d6ffe6e5040b5">Cy_DMAC_Enable</a>.<br />
<b>NOTE:</b> If the DMAC descriptor is configured to generate an interrupt, the interrupt must be enabled using the <a class="el" href="group__group__dmac__channel__functions.html#gae0485c56ffe98283f8b9326ee6d516ae">Cy_DMAC_Channel_SetInterruptMask</a> function for each DMAC channel.</p>
<p>For example: </p><div class="fragment"><div class="line"><span class="preprocessor">    #define DATA_COUNT (8UL)</span></div><div class="line">    <span class="comment">/* Scenario: Initialize a 1D descriptor */</span></div><div class="line">    <a class="code" href="structcy__stc__dmac__descriptor__t.html">cy_stc_dmac_descriptor_t</a> descriptor;</div><div class="line">    <a class="code" href="structcy__stc__dmac__descriptor__t.html">cy_stc_dmac_descriptor_t</a> nextDescriptor;</div><div class="line">    uint32_t src[DATA_COUNT];</div><div class="line">    uint32_t dst[DATA_COUNT];</div><div class="line">    </div><div class="line">    <a class="code" href="structcy__stc__dmac__descriptor__config__t.html">cy_stc_dmac_descriptor_config_t</a> descriptor_cfg = </div><div class="line">    {</div><div class="line">        .<a class="code" href="structcy__stc__dma__descriptor__config__t.html#afcc039279bc1e7d50b0813778772f3c0">retrigger</a> = <a class="code" href="group__group__dmac__enums.html#gga016be77931e116644c70e934101dd7c3ab796353bb8bb6f244bb8f6d94d002396">CY_DMAC_RETRIG_IM</a>,</div><div class="line">        .interruptType = <a class="code" href="group__group__dmac__enums.html#gga78bb44cea66b230aadd012c5bae864a3a274e048caf530edf7ef6159face7c486">CY_DMAC_DESCR</a>,</div><div class="line">        .triggerOutType = <a class="code" href="group__group__dmac__enums.html#gga78bb44cea66b230aadd012c5bae864a3a274e048caf530edf7ef6159face7c486">CY_DMAC_DESCR</a>,</div><div class="line">        .channelState = <a class="code" href="group__group__dmac__enums.html#gga0e57c8ab013d71005b81e60c2c4ee7a9acbff6554ce23780e0fcf2af9e97816cc">CY_DMAC_CHANNEL_ENABLED</a>,</div><div class="line">        .triggerInType = <a class="code" href="group__group__dmac__enums.html#gga78bb44cea66b230aadd012c5bae864a3a274e048caf530edf7ef6159face7c486">CY_DMAC_DESCR</a>,</div><div class="line">        .dataSize = <a class="code" href="group__group__dmac__enums.html#ggac2fda05300faa05ecfc118f22ed2a3c5ad4112bd05bdc21a993b63b0957bfacf8">CY_DMAC_WORD</a>,</div><div class="line">        .srcTransferSize = <a class="code" href="group__group__dmac__enums.html#gga678295e9e6a31ad41feab278d0faf4d1a108838a4e9ea224b4a471593b6484471">CY_DMAC_TRANSFER_SIZE_WORD</a>,</div><div class="line">        .dstTransferSize = <a class="code" href="group__group__dmac__enums.html#gga678295e9e6a31ad41feab278d0faf4d1a108838a4e9ea224b4a471593b6484471">CY_DMAC_TRANSFER_SIZE_WORD</a>,</div><div class="line">        .descriptorType = <a class="code" href="group__group__dmac__enums.html#ggafc067b535081b9cd83fa29b9e68b002ca700cc18061eb5de2f16f3dc1ee96fbe8">CY_DMAC_1D_TRANSFER</a>,</div><div class="line">        .srcAddress = &amp;src,</div><div class="line">        .dstAddress = &amp;dst,</div><div class="line">        .srcXincrement = 1U,</div><div class="line">        .dstXincrement = 1U,</div><div class="line">        .xCount = DATA_COUNT,</div><div class="line">        .srcYincrement = 0U,</div><div class="line">        .dstYincrement = 0U,</div><div class="line">        .yCount = 1UL,</div><div class="line">        .nextDescriptor = &amp;nextDescriptor,</div><div class="line">    };</div><div class="line">    </div><div class="line">    <span class="keywordflow">if</span> (<a class="code" href="group__group__dmac__enums.html#gga67fe9048608517c9cdebbe0372866eb5a5c4b9c1a66c7776ddc98a5b3dedac160">CY_DMAC_SUCCESS</a> != <a class="code" href="group__group__dmac__descriptor__functions.html#gad4204ef079b02d9afdd9328f0cd461f9">Cy_DMAC_Descriptor_Init</a>(&amp;descriptor, &amp;descriptor_cfg))</div><div class="line">    {</div><div class="line">        <span class="comment">/* Insert error handling */</span></div><div class="line">    }</div><div class="line">    </div><div class="line">    <span class="comment">/* Scenario: Setup and enable the DMAC channel 0 */</span></div><div class="line">    <a class="code" href="structcy__stc__dmac__channel__config__t.html">cy_stc_dmac_channel_config_t</a> channelConfig;</div><div class="line">    channelConfig.<a class="code" href="structcy__stc__dmac__channel__config__t.html#a01cab162709493ed756b6cb21219ff51">enable</a> = <span class="keyword">false</span>;</div><div class="line">    channelConfig.<a class="code" href="structcy__stc__dmac__channel__config__t.html#ade9585ff561af6ad292932293e0bd15d">bufferable</a> = <span class="keyword">false</span>;</div><div class="line">    </div><div class="line">    <span class="keywordflow">if</span> (<a class="code" href="group__group__dmac__enums.html#gga67fe9048608517c9cdebbe0372866eb5a5c4b9c1a66c7776ddc98a5b3dedac160">CY_DMAC_SUCCESS</a> != <a class="code" href="group__group__dmac__channel__functions.html#ga7b508e6cc332b4d009bf9b09ed6529b3">Cy_DMAC_Channel_Init</a>(DMAC, 0UL, &amp;channelConfig))</div><div class="line">    {</div><div class="line">        <span class="comment">/* Insert error handling */</span></div><div class="line">    }</div><div class="line">    </div><div class="line">    <a class="code" href="group__group__dmac__channel__functions.html#ga0ea7589df07e40e6723dc7f992e6994b">Cy_DMAC_Channel_SetDescriptor</a>(DMAC, 0UL, &amp;descriptor);</div><div class="line">    <a class="code" href="group__group__dmac__channel__functions.html#ga4e68ab04d5de2d6a1b31779741aa64db">Cy_DMAC_Channel_SetPriority</a>(DMAC, 0UL, 3UL);</div><div class="line">    <a class="code" href="group__group__dmac__channel__functions.html#gab39e11c3ad72ebfd07cdd9840385769b">Cy_DMAC_Channel_Enable</a>(DMAC, 0UL);</div><div class="line">    </div><div class="line">    <a class="code" href="group__group__dmac__block__functions.html#ga3f45f389340c3282c59d6ffe6e5040b5">Cy_DMAC_Enable</a>(DMAC);</div><div class="line">    </div><div class="line">    <span class="keywordflow">if</span> (<span class="keyword">true</span> != <a class="code" href="group__group__dmac__channel__functions.html#ga4423c4dbc11bb51cb622e95fb593ee9c">Cy_DMAC_Channel_IsEnabled</a>(DMAC, 0UL))</div><div class="line">    {</div><div class="line">        <span class="comment">/* Insert error handling */</span></div><div class="line">    }</div><div class="line"></div></div><!-- fragment --><p> CM7 cores in CAT1C devices support Data Cache. Data Cache line is 32 bytes. User needs to make sure that the source and destination buffer pointers and the config structure pointers passed to the following functions points to 32 byte aligned data. Cy_DMAC_Channel_SetDescriptor, Cy_DMAC_Descriptor_SetNextDescriptor, Cy_DMAC_Descriptor_SetSrcAddress, Cy_DMAC_Descriptor_SetDstAddress. User can use CY_ALIGN(32) macro for 32 byte alignment. User needs to clean the following data elements from the cache and invalidate before accessing them. source and destination buffers and descriptor structure.</p><ul>
<li><div class="fragment"><div class="line">    uint32_t i;</div><div class="line">     <span class="keywordflow">for</span>(i = 0; i &lt; DATACNT; i++)</div><div class="line">    {</div><div class="line">        dstData[i] = 0;</div><div class="line">        srcData[i] = i;</div><div class="line"></div><div class="line">    }</div><div class="line">    <a class="code" href="group__group__dmac__descriptor__functions.html#gad4204ef079b02d9afdd9328f0cd461f9">Cy_DMAC_Descriptor_Init</a>(&amp;Descriptor_0, &amp;Descriptor_0_config);</div><div class="line">    <a class="code" href="group__group__dmac__descriptor__functions.html#ga6b71b6054e4e16bb3ba58bfdd5bab2cc">Cy_DMAC_Descriptor_SetSrcAddress</a>(&amp;Descriptor_0, srcData);</div><div class="line">    <a class="code" href="group__group__dmac__descriptor__functions.html#gad9a9e073cd42384059732d86bd3c8dbf">Cy_DMAC_Descriptor_SetDstAddress</a>(&amp;Descriptor_0, dstData);</div><div class="line">    <a class="code" href="group__group__dmac__channel__functions.html#ga7b508e6cc332b4d009bf9b09ed6529b3">Cy_DMAC_Channel_Init</a>(DMAC, 0U, &amp;channelConfig);</div><div class="line">    <a class="code" href="group__group__dmac__block__functions.html#ga3f45f389340c3282c59d6ffe6e5040b5">Cy_DMAC_Enable</a>(DMAC);</div><div class="line"></div><div class="line"></div><div class="line"><span class="preprocessor">#if (CY_CPU_CORTEX_M7) &amp;&amp; defined (ENABLE_CM7_DATA_CACHE)</span></div><div class="line">    SCB_CleanDCache_by_Addr((uint32_t*)srcData, DATACNT);</div><div class="line">    SCB_CleanDCache_by_Addr((uint32_t*)&amp;Descriptor_0, <span class="keyword">sizeof</span>(Descriptor_0));</div><div class="line"><span class="preprocessor">#endif</span></div><div class="line">    <a class="code" href="group__group__dmac__channel__functions.html#gab39e11c3ad72ebfd07cdd9840385769b">Cy_DMAC_Channel_Enable</a>(DMAC, 0U);</div><div class="line"><span class="preprocessor">#if defined(KIT_XMC7200) || defined(KIT_XMC7100)</span></div><div class="line">    <a class="code" href="group__group__trigmux.html#ga882218319ecd105dede8b382e9a1c4a4">Cy_TrigMux_SwTrigger</a>(TRIG_OUT_MUX_3_MDMA_TR_IN0, <a class="code" href="group__group__trigmux__macros.html#ga9347a341f6903dee749841fae0dcb4a5">CY_TRIGGER_TWO_CYCLES</a>);</div><div class="line"><span class="preprocessor">#else</span></div><div class="line">    <a class="code" href="group__group__trigmux.html#ga882218319ecd105dede8b382e9a1c4a4">Cy_TrigMux_SwTrigger</a>(TRIG_OUT_MUX_6_MDMA_TR_IN0, <a class="code" href="group__group__trigmux__macros.html#ga9347a341f6903dee749841fae0dcb4a5">CY_TRIGGER_TWO_CYCLES</a>);</div><div class="line"><span class="preprocessor">#endif</span></div><div class="line">    <span class="keywordflow">while</span>(!<a class="code" href="group__group__dmac__channel__functions.html#ga7fe55ddff581132a9d35f03cd5941cf8">Cy_DMAC_Channel_GetInterruptStatus</a>(DMAC,0U))</div><div class="line">    {</div><div class="line"></div><div class="line">    }</div><div class="line"><span class="preprocessor">#if (CY_CPU_CORTEX_M7) &amp;&amp; defined (ENABLE_CM7_DATA_CACHE)</span></div><div class="line">    SCB_InvalidateDCache_by_Addr ((uint32_t*)dstData, DATACNT);</div><div class="line"><span class="preprocessor">#endif</span></div><div class="line">    int32_t cmpRes = memcmp(srcData, dstData, DATACNT);</div><div class="line">    <span class="keywordflow">if</span> (cmpRes !=0)</div><div class="line">    {</div><div class="line">        <span class="comment">/* Insert error handling */</span></div><div class="line">    }</div><div class="line">    <span class="keywordflow">else</span></div><div class="line">    {</div><div class="line">        <span class="comment">/* working case */</span></div><div class="line">    }</div></div><!-- fragment --> </li>
</ul>
<h1><a class="anchor" id="group_dmac_more_information"></a>
More Information.</h1>
<p>See the DMAC chapter of the device technical reference manual (TRM).</p>
<h1><a class="anchor" id="group_dmac_changelog"></a>
Changelog</h1>
<table class="doxtable">
<tr>
<th>Version</th><th>Changes</th><th>Reason for Change </th></tr>
<tr>
<td>1.40 </td><td>Added new API <a class="el" href="group__group__dmac__channel__functions.html#ga4423c4dbc11bb51cb622e95fb593ee9c">Cy_DMAC_Channel_IsEnabled</a>. </td><td>New devices support.  </td></tr>
<tr>
<td>1.30.1 </td><td>Minor Documentation update for cache usage on CM7. </td><td>Documentation enhancement.  </td></tr>
<tr>
<td>1.30 </td><td>Update to configure DMAC on core CM7. </td><td>Support for new product family.  </td></tr>
<tr>
<td>1.20 </td><td>Fixed MISRA 2012 violations. </td><td>MISRA 2012 compliance.  </td></tr>
<tr>
<td>1.10.1 </td><td>Minor documentation updates. </td><td>Documentation enhancement.  </td></tr>
<tr>
<td>1.10 </td><td>The <a class="el" href="group__group__dmac__channel__functions.html#ga31fbd71a93ff4332b8e8df56090f9423">Cy_DMAC_Channel_ClearInterrupt</a> is changed. </td><td>Minor defect fixing.  </td></tr>
<tr>
<td>1.0 </td><td>The initial version. </td><td></td></tr>
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